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If a thicker wire has a resistance of 1.0 , what is the resistance of the thinner wire?
Find the open-circuit voltage gain Gv o and the output resistance Rout . Use these values first to verify the value of Gv obtained
Now if transistor ß is specified to lie in the range 50 to 150, find the corresponding range of Rout and Gv .
Find the overall voltage gain when the follower is driven by a 10-kO source and loaded by a 1-kO resistor.
Find expressions for vc/vsig and ve/vsig.If vsig is disconnected from node X, node X is grounded,
If the BJT is biased at IC = 1 mA and the Early voltage is 100 V, provide a better estimate of the voltage gain Gv
If the amplifier remained linear throughout this measurement, what must the values of gm and ro be?
In this problem, we investigate the effect of changing the bias current IC on the overall voltage gain Gv of a CE amplifier
arrange to bias the NMOS transistor at ID = 0.5 mA with VD midway between cutoff and the beginning of triode operation.
what are the extreme values of ID that may result? What value of RS should have been installed to limit the maximum value of ID to 1.5 mA
If a transistor for which kn is 50% higher is used, what is the resulting percentage increase in ID?
What must Vt be for this device? If a device for which Vt is 0.5 V less is used, what does VS become? What bias current results?
Design for a dc bias current of 0.5 mA and for the largest possible voltage gain (and thus the largest possible RD) consistent
Design the circuit in Figure, so that the transistor operates in saturation with VD biased 1 V from the edge of the triode region
A very useful way to characterize the stability of the bias current ID is to evaluate the sensitivity of ID relative to a particular transistor
Also find the current gain, defined as the ratio of the load current to the current drawn from the signal source
The nominal overall voltage gain is 10 V/V.the change in output voltage is limited to 5% of nominal value; and
and Rout is the output resistance with vsig set to zero. This is different than Ro. Show that
Parameters is most affected by Rf (that is, relative to the case with Rf =8)? For Rsig = 100 kO determine the overall voltage gain,
Find the current I in the circuit below. Your answer may be a function of the voltage supply VS. Clearly show all your work.
Two identical CS amplifiers are connected in cascade. The first stage is fed with a source vsig having a resistance Rsig = 200 kO
If the peak voltage of the sine wave appearing between base and emitter is to be limited to 5 mV, what vˆsig is allowed, and what output voltage signal appears
Two identical CE amplifiers are connected in cascade. The first stage is fed with a source vsig having a resistance Rsig = 10 kO.
A MOSFET connected in the CS configuration has a trans conductance gm = 5 mA/V. When a resistance Rs is connected in the source lead
A CG amplifier using an NMOS transistor for which g m =2 mA/V has a 5-k O drain resistance RD and a 5-kO load resistance RL.