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If the amplifier remained linear throughout this measurement, what must the values of gm and ro be?
We investigate the effect of changing the bias current IC on the overall voltage gain Gv of a CE amplifier.
Design the circuit of Fig. for a MOSFET having Vt = 1 V and kn = 4 mA/V2. Let VDD = VSS = 5 V.
Design the circuit in Fig. so that the transistor operates in saturation with VD biased 1 V from the edge of the triode region.
Find the required value of (IDRS) and VG to limit ? ID/ID to ± 5%. What value of RS is needed if ID is 100 µA?
Evaluate Rin , Av o, and Ro for the case R1 = 100 kO , Rf = 1MO, gm= 100 mA/V, R2 = 100kO , and RL = 1 kO.
Calculate the overall voltage gain of a CS amplifier fed with a 1-M_ source and connected to a 10-kO load.
If a load resistance of 10 k O is connected to the output, what overall voltage gain Gv is realized?
If it is required to realize an overall voltage gain Gv of -10 V/V what gm is needed?
Two identical CS amplifiers are connected in cascade. The first stage is fed with a source vsig having a resistance Rsig = 200 kO .
If the peak voltage of the sine wave appearing between base and emitter is to be limited to 5 mV, what vˆsig is allowed.
If ß can be anywhere between 50 and 50, what is the corresponding range of / Gv/ ?
What value should a resistance Rs inserted in the source lead have to reduce the overall voltage gain to -5 V/V?
A MOSFET connected in the CS configuration has a trans conductance gm = 5 mA/V.
What value of Rs is needed to obtain an overall voltage gain of -16 V/V?
If the peak voltage of the sine wave appearing between base and emitter is to be limited to 5 mV, what vˆsig is allowed, and what output voltage signal.
If the total resistance in the collector is 6 kO , find the overall voltage gain Gv and the peak amplitude of the output signal vo.
Inclusion of an emitter resistance Re reduces the variability of the gain Gv due to the inevitable wide variance in the value of ß.
What is the input resistance of the amplifier? What is the overall voltage gain Gv ?
When a 100-O istance was added in series with the signal generator the overall voltage gain decreased to 10 V/V.
If the maximum signal amplitude of the voltage between base and emitter is limited to 10 mV, what are the corresponding amplitudes of vsig and vo?
At what current IC should the transistor be biased for the input resistance Rin to equal that of the signal source?
Find the dc voltage at the Collector, the amplitude of the output voltage signal, and the voltage gain.
Show that the input resistance between base and emitter, looking into the base, is equal to rp .
Your circuit should show the values of all components, including the model parameters. What is the input resistance Rin?