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A cascode current source formed of two pnp transistors for which ß = 50 and VA = 5 V supplies a current of 0.2 mA.
Assume that the BJTs have ß =100 and that both the BJTs and the MOSFETs have / VA/ = 5 V.
In this problem, we will explore the difference between using a BJT as cascode device and a MOSFET as cascade device.
What will the extent of the linear region at the output become?
Find the value of the dc component that will result in the maximum possible signal swing at the output with almost-linear operation.
It is required to design the circuit to obtain a voltage gain Av = -40 V/V. Use devices of equal length L operating at I = 100 µA and / VOV/ = 0.25 V.
Assuming that Van = / VAp / and that the biasing current sources have output resistances equal to those of Q1: and Q2.
What is the peak of the largest output sine-wave signal that is possible while the NMOS transistor remains in saturation?
If Q2: and Q3: are to be operated at the same overdrive voltage as Q1: what must their W/L ratios be?
What are the extreme values of vO for which Q1: and Q2: just remain in saturation?
For finite ro( /VA /= 20 V), what is the voltage gain from G to D and the input resistance at G?
Neglecting the finite base currents of Q2: and Q3: and assuming that their VBE ?0.7 V and that Q2: has five times the area of Q3: find the value of I.
If it is required to raise the gain by a factor of 2, what channel length would be required, and by what factor does the total gate area of the circuit increas
A CG amplifier operating with gm = 2 mA/V and ro =20 kOis fed with a signal source having Rs =1 kO.
If RL increases by a factor of 10, by what percentage does the current gain change?
If the maximum allowed dc voltage drop across Rs is 0.3 V, what is the maximum available output resistance of the current source?
How large can vsig be (peak-to-peak) while maintaining saturation-mode operation for Q1: and Q2.
As mentioned in the text, the C B amplifier functions as a current buffer. That is, when fed with a current signal, it passes it to the collector and supplies.
The BJT is specified to have ß =100, VBE =0.7 V, and VA = 100 V. If the collector voltage undergoes a change of 10 V while the BJT remains in the active mode.
It is required to find the incremental (i.e., small-signal) resistance of each of the diode-connected transistors shown in Figure
What is the lowest voltage at the output for which proper current-source operation is maintained?
If the deviation from unity is to be kept at 0.2% or less, what is the maximum possible number of outputs for BJTs with ß = 150?
For the base-current-compensated mirror of Figure ,show that the incremental input resistance is approximately 2VT /IREF.
If the amplifier is fed with a signal source having Rsig = 5 kO and is connected to a load of 100-kO resistance, find the overall voltage gain, vo/vsig.
Find the intrinsic gain of an NMO Stransistor fabricated in a process for which k1 n = 400 µA/V2 and V1A = 10 V µm.