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q two balanced three-phase wye-connected loads are in parallel across a balanced three-phase supply load 1 draws 15 kva at 08 power factor lagging
q two balanced three-phase wye-connected loads are in parallel across a balanced three-phase supply load 1 draws a current of 20 a at 08 power factor
q three identical impedances of 30 30deg are connected in delta to a three-phase 173-v system by conductors that have impedances of 08 j06 each
q a balanced delta-connected load with a per-phase impedance of 30j10 is connected in parallel with a balanced wye-connected load with a per phase
q balanced wye-connected loads drawing 10 kw at 08 power factor lagging and 15 kw at 09 power factor leading are connected in parallel and supplied
q a 60-hz 440-v three-phase system feeds two balanced wye-connected loads in parallel one load has a per-phase impedance of 8 j3 and the other 4 -
q a balanced delta-connected load with a per-phase impedance of 12 j9 is supplied by a 173-v 60-hz three-phase sourcea determine the line current
q a balanced wye-connected load with a per-phase impedance of 4 j3 is supplied by a 173-v 60-hz three-phase sourcea find the line current the power
q a three-phase three-wire 208-v system is connected to a balanced three-phase load the line currents macr ia macr ib and macr ic are given to be in
q the line-to-line voltage of a balanced wye connected three-phase source is given as 100 v choose vab as the referencea for the phase sequence a-b-c
q an integrator as shown in figure is to be designed to solvedyt dt 2000y t 0with y0 5 if ri is chosen to be 10 k find
q the input resistance of an ideal op amp with no feedback is infinite investigate the input resistance of an op amp with a feedback resistance rfa
q digital watches display time by turning on a certain combination of the seven-segment display devicea show a typical seven-segment displayb develop
q show the schematic arrangement for a one- dimensional addressing and b two-dimensional addressing if a 32-kbit rom is used to provide an 8-bit
q suppose a rom holds a total of 8192 bitsa how many bits long would the individual addresses have to beb if the bits are organized into 8-bit memory
q how many 500-page books can be stored on a 2400-ft 1600-bpi magnetic tape if a typewritten page contains about 2500
q an 8-bit ad converter is driven by a 1-mhz clock estimate the maximum conversion time ifa it is a counter-controlled ad converterb it is a
a design a 6-bit r-2 r ladder da converterb for vref 10 v find the maximum output voltagec determine the output voltage incrementd if the output
q what is the basic difference between the weighted resistor and the r-2 r ladder da
q for a 10-bit r-2r ladder-network da converter with an msb resistor value of 10 k what is the value of the lsb
q consider the 4-bit r-2r ladder da converter with vref -10 v determine the analog output voltage when the binary input code is 1100 also find what
q analyze the 2-bit r-2r ladder-network da converter and corresponding to binary 01 10 and 11 obtain the equivalent circuits and determine the analog