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consider the circuit shown in figurethe circuit has been operating for a long time with the switch closed prior to t
for a sufficiently high frequency measurement of the complex input impedance of a bjt having ac grounded emitter and
the bjt common-emitter amplifier of fig includes an emitter-degeneration resistance rea assuming alpha1 neglecting ro
for the common-emitter amplifier of fig neglect ro and assume the current source to be ideala derive an expression for
consider the common-emitter amplifier of fig under the following conditions rsig 5 komega rb1 33 komega rb2 22
consider the common-emitter amplifier of fig under the following conditions rsig 5 komega b1 33 komega rb2 22
a logic-circuit family with zero static power dissipation normally operates at vdd 25 v to reduce its dynamic power
a particular logic gate has tplh and tphl of 30 ns and 50 ns respectively and dissipates 1 mw with output low and 06 mw
a collection of logic gates for which the static power dissipation is zero and the dynamic power dissipation is 10 mw
in a particular logic-circuit technology operating with a 33-v supply the basic inverter draws from the supply a
an ic inverter fabricated in a 018-mum cmos process is found to have a load capacitance of 10 ff if the inverter is
consider the two-inputcmosnorgate of fig 147 whose transistors are properly sized so that the current-driving
figure shows two approaches to realizing the or function of six input variables the circuit in fig though it uses
consider a four-input cmos nand gate for which the transient response is dominated by a fixed-size capacitance etween
a rigid jointed plane frame shown below has both its column bases fixed all members have a constant sectioncalculate
for the inverter circuit in fig let vi go fromvdd to 0 v at t 0 at t 0 vo vol find expressions for voh vot and tplh if
consider thecmosinverter of fig withqn and qp matched and with the input vi rising slowly from 0 to vdd at what value
for the inverter of fig with a capacitance c connected between the output and ground let the on-resistance of pu be 2
in a particular logic family the standard inverter when loaded by a similar circuit has a propagation delay specified
consider an inverter for which tplh tphl ttlh and tthl are 20 ns 10 ns 30 ns and 15 ns respectively the rising and
for a cmos inverter fabricated in a 018-mum process with vdd 18 v vtn -vtp 05 v k1 n 4k1p 300 muav2 and having wln
for the current-steering circuit in fig vcc 2 v iee 05 ma find the values of rc1 and rc2 to obtain a voltage swing of
anearlier form of logic circuits now obsolete utilized nmos transistors only and was appropriately called nmos logic
design the inverter circuit in fig to provide voh 12 v vol 50 mv and so that the current drawn from the supply in the
a logic-circuit type intended for use in a digital-signal-processing application in a newly developed hearing aid can