1) Describe what is meant by the DC characteristics of CMOS inverter.
2) Deduce the voltage and the current relations of CMOS transistor.
3) Describe the behavior of the dynamic CMOS design in terms of the following a) Speed,
b) Power dissipation,
c) Signal integrity issues cascading and
d) Charge sharing.
4) Sketch the four inputs CMOS NAND gate in the static dynamic CMOS design, CMOS design, and the domino logic.
5) Describe the 8 x 8 Baugh Wooley multiplier.
6) Discuss the C2MOS based pipelined circuit with the help of an example.
7) Describe the Kernighan Lin algorithm by giving a suitable example.
8) Describe the simulated annealing portioning technique.
9) Describe the force directed placement algorithm with the help of an example.
10) Specify the goals and objectives of the floor planning. Describe how the delays can be determined in the floor planning.