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Design (simulaton, analysis), build and test an op-amp based instrumentation amplifier with the following specifications: (a) Have very high input resistance (minimum is 1 Mega Ohm). (b) Have very hig
DC supply=18v Motor Noload speed=9,000RPM 018V ton=40% -60% in 10ms in 5 steps a) Calculate B for each of the 5 steps b) calculate Vavrage over 10ms c)calculate no load speed d)draw a linear graph inc
the capacitance varies depends on the distance of the two plates from 0 to about 20in. this model is needed to generate an input to an other part of the circuit to simulate it and obtain the output
Write the mathlab program to plot the modulation index necessary to keep the Vdc constant at 1200v when the input power factor angle is varied from -60 degrees to 60 degrees.
Each phase of the load consists of an impedance of 30 + j40 *. Find the linetoneutral voltage phasors, the line-to-line voltage phasors, the line-current phasors, the power, and the reactive power d
In addition, you have a 32-Kbyte Flash chip, a 16-Kbyte SRAM chip, and a 16 KByte DPRAM chip. You want to locate the FLASH chip right in the beginning of the address space, the SRAM chip just after
Discuss the sequential nature of the Ripple Carry Output Adder. Why is it actually a sequential operation What are problems associated with this type of sequential design? How would you alleviate
suppose that you have a balanced stereo signal in which the left and right channels have the same voltage amplitude 500 mVpp. This time, however, you want to be able to mix these two channels into a
how many roots of the following two polynomials are in the right half plane and left half plane P(s)= s^5 + 3s^4 + 5s^3 + 4s^2 + s + 3 P(s)= 3s^7 + 9s^6 + 6s^5 + 4s^4 +7s^3+ 8s^2+2s+6
For Each Pair of Second-order systems specifications that follow, find the locations of the second order poles a) Overshoot %= 12% , Ts= 0.6 seconds b) Overshoot %= 10%, Tp= 5 seconds c) Ts= 7 seconds
A shunt regulator utilizing a zener diode with an incremental resistance of 5ohm is fed through an 82ohm resistor. If the raw supply changes by 1.0V, what is the corresponding change in the regulate
For the LCD configured in 8-bit mode, describe the signal conditions for CSB, E, RS, R/W~, and the data bits (D7 thru D0) needed to write the letter character ‘A' from the microcontroller into
A first order highpass filter is required to satisfy the following specifaction fs=10000Hz fc=4000Hz Find the transfer function and difference equation by the pole-zero placement method.
In the presentation, "IT and Smart Grid" the presenter, Dr. Peter Will, provided several definitions of "smart-grid". Provide your definition of smart-grid the way you understand it. What are s
Given the following IIR system with zero initial conditions: y[n]=0.2 x[n]- 0.5y[n-1] -0.06y[n-2] a)find the first five samples of the impulse response b) find the first five step response
Using the IIR digital filter design, determine the difference equation to generate a single 852 Hz tone with a sampling frequency of 8000Hz
A second-order bandstop filter is required to satisfy the following specifications: fs= 8,000 Hz f0= 60 Hz bandwidth= 40 Hz Find the transfer function and difference equation by the pole- zero placeme
Assuming that a 12-bit ADC channel accept analog input ranges from 0 to 20 volts, determine the following a) number of quantization levels b) step size of the quantizer or resolution
Design a first-order digital highpass chebyshev filter (.5-db ripple) with a cutoff frequency of 850 Hz and a sampling frequency of 10 kHz. Determine the transfer function using BLT.
given analog signal : x(t)=8cos(6,000pi)+5cos(14,000pit) t>=0 sampled at rate 12,000 Hz a) sketch the spectorum of the orignal signal and the sampled signal from 0 KHz and 25 KHz.
The nameplate on a 25-MVA, 60-Hz single-phase transformer indicates that it has a voltage rating of 8.0-kV:78-kV. A short-circuit test from the high-voltage side (low-voltage winding short circuited
Given a 1-phase 50 kVA 12.47 kV pf = 0.8 lagging static load a. Modeling the load as constant complex power, determine the correct value for S and I. b. Modeling the load as constant complex impedance
It is operating at 50% of its rated load at a power factor of .5 leading, compute efficiency using both exact and approximate equivalent circuits as referred to the primary side. Tabulate the percen
Create a Verilog module that implements 4 bit full adder-subtractor with overflow detection. You may use Verilog bitwise operators and gate primitives, but no mathematical operators or behavioral Ve
Design a circuit that will display the decimal numbers that are less than 60 by using two 7-segment displays. The number 60 should be displayed as 00. Use the least amount of IC's as possible.