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In the positiveVGs region, does the drain current increase at asignificantly higher rate than for negative value Does the ID curve become more and more vertical with increasingpositive value of VGs.
The power consumption of a single-phase electric load fed froma 120V source is represented by: P(t)=100 (1-e-t/10)KW where t is the unit of time inhours. compute the energy consumed by the load over t
Determine the half power frequency fc defined as the frequencyat which the magnitude of the transfer function is at 1/√2 ofits maximum value. Assuming C is fixed at 0.02 μF, calculatethe ha
Suppose you have a silicon wafer containing a p++n junction. Design the doping level on the n-side so that the reverse break down voltage is 45 V.
A submarine uses a λ/2 -dipole antenna for RFcommunications with the Naval Command Control and OceanSurveillance Center that also equipped with a λ/2-dipole. Operating frequency is 30
design a LUT to implement an adder. The adder takes as input two 2-bit numbers. (a) What is the minimum size ROM that will be required. (b) What data is stored in each memory location in this ROM.
A mass memory system has 24 address lines and 16 data lines. (a) What is the size of this memory system. (b) How many 64K x 8 memory chips are needed to build this memory system.
Two resistors are to be combined to form an equivalentresistance of 1000 Ω (or close to it). Readily available are two common resistors rated at 2000 Ω. To ensure the resistors are rated c
A bank of induction motors cosumes 36kW at 0.78pf lagging from a 60 Hz 240V RMS line. If 200μF of capacitors are placed in parallel with the load, what is the new power factor of the total load
The standing-wave ratio on a lossless 300transmission line terminated in anunknown load impedance is 2.5, and the nearest voltage minimum isat a distance 0.2λ from the load. Determine: a. the
A mass memory system has 24 address lines and 16 data lines. (a) What is the size of this memory system (b) How many 64K x 8 memory chips are needed to build this memory system
The processorgenerates a signal for the memory output enable input att=22 ns and decode logic generates the signal for the chipenable input at t=18 ns. What is the minimum time beforethe memory chip
You want to design a LUT toimplement an adder. The adder takes as input two 2-bit numbers. (a) What is the minimum size ROM that will be required. (b) What data is stored in each memory location
Sketch the amplitude response (include the half-power frequencies) of the impedance of a parallel RLC circuit having R=2Ω, L=1H, and C=(1/25)F, after it is magnitude-scaled by Km=(5x10^3) and
The result of part a) is the upperlimit. However, as a practical matter, better error performancewill be achieved at a lower data rate. Assume wechoose a data rate of 2/3 teh maximum theoretical lim
A lot of size N= 30 contains three nonconforming units. What is the probability that a sample of five units selected at random contains exactly one nonconforming unit what is the probability that it
If the circuit is driving a 100Ω load with a signal generator that has an output impedance of 50Ω and an open-circuit output voltage of .5sin(500t+30º), determine the steady state o
Describe how to measure Rin of a amplifier in the lab at a signal frequency of 500kHz with only an oscilloscope as a test instrument. A DMM may not be used.
If the lower and upper specification for voltage are 4.95V and 5.05 V, respectively what is the probability that a power supply selected at random will conform to the specification on voltage
Consider the following discrete-time signal where the samplesare represented using N bits. a. How many bits are needed to ensure that the quantization levelis less than 0.001. b. Suppose N = 8 bits. W
Design a counter whose count sequence is all prime numbers greater than 4 less than 55. Provide the excitation equations for the FlipFlops.
Design a sequential circuit that receives a 50% duty cycle clock offrequency f and outputs a clock signal of frequency f/7. (Note: theoutput does not have a 50% duty cycle.) Provide a complete schem
If the circuit is driving a100Ω load with a signal generator that has an output impedance of50Ω and an open-circuit output voltage of0.5sin(500t+30o),determine the steady state output vo
What does a small delay spread indicate about the characteristics of a fading channel. If delay spread is 1microsecond, will two different frequencies that are 5 MHz apartexperience correlated fadin
What is the largest binary number that can be repressed with 14 bits. What are the equivalent decimal and hexadecimal numbers.