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Implement the counter by T, D, and JK-flip-lops and compare the complexities of realizations in the number of circuits count.
Determine the state table and the minimized next state functions.
Design the state diagram and the state transition table for the Moore machine with a single input x and and the output y specified as follows.
Compare complexities of the realizations of the vending machine specified in the Problem by D-flip-flops and SR-flip-flops.
Realize the function f of five variables defined by the truth-vector.
Determine the number of EXOR operations required in FFT-like algorithms and decision diagram methods.
Discuss the relationships between the Boolean differences and coefficients in the Reed-Muller expressions.
What the are relationships between the Boolean differences and coefficients in the Fixed-polarity Reed-Muller expressions?
Form their Kronecker product structure, determine the matrix relations for calculation of higher order Boolean differences.
calculate the Boolean difference of the first and the second order with respect to the variables x1, x2, x4 and x1x3 and x2x3.
Determine the set of test for the error line e stuck-at 0 and 1.
Realize these functions by a PLA directly and compare the complexities of the realizations in terms of the number of columns of the PLAs.
Analyze the cellular array in the Fig. A consisting of four different types of cells A, B, C, and D, and determine the output functions f and g.
Determine the output of the array in Fig., where each cell realizes the majority function of three variables .
The first two rows are the Reed-Muller modules in Figure and the last row are EXOR circuits.
Discuss the main features of FPGAs which make their application efficient, compared to PLAs .
Describe the steps in synthesis with FPGAs and explain notions module function, cluster function.
Realize a network for the code converter which converts the binary code with weights 4221 of first 10 non-negative integers numbers into the Gray code.
Repeat the realization with the same decoder and an NOR circuit. Compare the realizations in the number of required outputs of the decoder.
Realize f by an (8 × 1) decoder and an AND circuit and the same decoder and a NAND circuit.
Realize the switching function f = x1x3 + x1x2 + x1x2x3 + x1x2x3 by an (8 × 1) multiplexer.
Start by the Shannon expansion of f with respect to two variables that appear in the largest number of products.
Realize the function f(x1, x2, x3, x4) = x1?x2?x3?x4 by a network of multiplexers.
From the BDD for the function f(x1, x2, x3, x4) = x1x2? x1x3 ? x2x3x4, determine the corresponding (2×1) multiplexer network.
Realize by PLA a BCD to Gray code converter, where the BCD number is represented by x1, x2, x3, x4 and the four outputs for the Gray code word y1, y2, y3, y4.