Gate oxide thickness in 1microm cmos is 20 nm on sd areas


Gate oxide thickness in 1µm CMOS is 20 nm. On S/D areas, it is thinned during gate polyplasma etching, but re-grown during poly oxidation. Calculate the oxide thickness under the following assumptions:

• poly etch rate is 250 nm/min;

• poly thickness is 250 nm;

• Si:SiO2 etch selectivity is 20:1;

• overetch time is 20 s;

• re-oxidation is 900 ?C, 10 min (dry).

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Econometrics: Gate oxide thickness in 1microm cmos is 20 nm on sd areas
Reference No:- TGS02200573

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