Ee222 applied analogue electronics - calculate the

Question

Question 1 (Bonding & Energies)

Under the assumption that the electric field created by the nucleus of the atom and the inner valence electrons act upon the outer valence shell electrons as a field of a point charge. The distance from the nucleus to the electron in the outermost orbit is a_o = 0.5 nm. It is assumed that the distance between atoms in Silicon crystal lattice is also equal to this value. [Note: Convert all units for energy from Joule to electronvolts.]

a. By using appropriate equations calculate;

i. The electric field established from the nucleus
ii. The electric field established by one orbiting electron
iii. The amount of work done (E_v) that is required in order to free one of the outer electrons.

b. If the energy required to move the electron out of the orbit is E_c = E_v + (1/3 E_v), then calculate E_c.

c. Calculate the temperature of external medium if, the work done (E_c) is contributed from heat. Given that the effective mass of electron in the intrinsic silicon semiconductor is m_n = 0.33 m_o (m_o is the mas of electron in vacuum).

d. Calculate Eg, if it is given as E_g = E_c - E_v.

e. Determine Fermi Level of silicon (Intrinsic semiconductor) given above.

f. Plot this information on an Energy Level and Indicate E_v, E_c and E_g and E_F.

g. Sketch a Fermi-Dirac occupation function for energies calculated above at RT. {Hint: Refer to Fig.1 handout 2/2, Eq. (53), E_n = E_c, plot for E_n<=E<=E_v.}

Question 2

Calculate dielectric relaxation (life) time in p-type Ge at room temperature. Assume that all acceptors are ionized. N_a = 10¹⁵ cm^-3, ε = 16, μ_p = 1900 cm^-2V^-1s^-1. Under the condition that all the acceptor atoms are ionized, (n_p = N_a) calculate the conductivity (σ) of the semiconductor material.

(a) Calculate Relaxation time
(b) Calculate conductivity

Question 3 (Fermi Energy Level and P-N Junction)

At room temperature a p-type semiconductor material has the concentration of acceptor atoms N_a = 10²⁰ cm^-3. Under a similar condition a n-type semiconductor material has a concentration of donor atoms N_d = 10¹⁷cm^-3. Assume that at room temperature both materials are exposed to energy level above conduction band so the p = N_a is p-type and n = N_d in the n-type materials. Assume that the density of intrinsic atoms prior to addition of impurities is n_i = 1 x 10¹⁵cm^-3. Based on this data, utilize appropriate relationships at thermal equilibrium;

a. Calculate;
i. the concentration of minority carriers in p-type semiconductor at room temperature.
ii. the concentration of minority carriers in n-type semiconductor at room temperature.

b. If the two semiconductor materials above are combined to form a p⁺-n Si junction then, prior to application of bias (external dc supply = 0V), we expect a movement of carriers to form depletion layer along both sides of the boundary. If the electron mobility in Si at RT is 1400 cm^-2 V^-1s^-1; μn/μp = 3.1; n_i = 1.05 × 10¹⁰ cm^-3, and εSiε_o = 11.9; (note that ε = εSiε_ο) then:

i. Find the total width of the depletion region of the of the p-n junction
ii. Find the maximum Electric Field of the p-n junction
iii. Find the build-in voltage (Vbi - Eq. (67)) of the junction
iv. Find the capacitance of the p-n junction

Question 4 (Diode Equation & Characteristics)

a. A p⁺-n Si junction with the reverse current at room temperature (RT) is 0.9 nA/cm². Calculate the minority-carrier lifetime if N_d = 10¹⁵ cm^-3, n_i = 1.05 × 10¹⁰cm^-3, and μ_p = 450 cm² V^-1s^-1?.

b. Calculate current (I_D) passing through the diode when it is forward biased at a temperature of;
i. 350 K
ii. 200 K, and

c. Using Eq. (48) of your lecture note, calculate the cross-section area (A) of the diode p-n junction if N_D = 10¹² cm^-3 and electron and hole mobility in Si at RT is related by μn/μp = 3.1.

d. If the reverse breakdown voltage of the junction is V_z = 40 Vdc, sketch a diode V-I Characteristic and indicate necessary parameters including those calculated above.

e. Refer to the circuit diagram given below to solve this problem. The circuit diagram below is connected in forward bias.

i. Evaluate the value of current through R_L
ii. Find voltage drop across current limiting resistor (R_CL).
iii. Find the voltage drop (V_bi) across the diode.