Part: Power Transistor amplifier design
Design a push-pull amplifier using the circuit arrangement given and with the following specifications:
Supply voltages: ± X V
Output power YW
Voltage gain > Z dB
Low frequency roll-off point < Q Hz (Lower bandwidth limit)
Rin > J ohms
[Specifications (X, Y, Z, Q, J) will be individualised to students on StudyDesk]
Show all calculations for component values from DC and AC considerations. Choose a suitable input signal voltage to achieve the specification.
[See Design Assignment A, Part C for design tips]
Simulation
Use MICROCAP (or similar) to simulate your design, using any suitable transistors (e.g. Q1).
I. Plot transient analysis of output (on load resistor) and input (to C1). You should expect to see a voltage gain >5 without distortion to the output sine waveform (ie: no clipping).
2. Short out the diode and R4 and repeat the transient analysis. Crossover distortion should be more visible.
3. Determine the d.c. bias values at the base, collector and emitter of Q3 and at the common emitter of the output stage. If your circuit does not work as expected, this should point to the errors.
4. Run an A.C. Analysis to confirm the gain and bandwidth requirements (ie: correct capacitor choices).
Part: Differential amplifier exercise The circuit
The circuit
Simulation
Use MICROCAP (or similar) to analyse the circuit. Leave out the voltage divider network (47k, 10k, 47k) for this.
I. Determine the d.c. voltages at both collectors and at the common emitter, by grounding the base of Q I and running a d.c. analysis.
2. Determine the d.c. response at either collector to a varying input voltage over the range -0.3v to +0.3v by adding a I mV d.c. source as shown above and running a d.c. analysis. Use limits as shown on next page.
3. Add a I pf capacitor to the input and so determine a.c. voltage gain, Ad (single collector to ground).
4. Connect the two bases together at the bias network and determine the a.c. common mode gain (single collector to ground). Change sine source to I V.
5. Add the constant current source shown below in place of the common emitter resistor RE and again determine the single ended a.c. common mode gain. (i.e., repeat 4 above). Notice that it is very frequency dependent, but for frequencies less than about I MHz, it is very much less than it was for the single resistor case. Hence common mode rejection ratio is very much improved.