Consider the CMOS RAM cell and data lines in Figure with circuit and transistor parameters described in Problem.
Assume initially that Q = 0 and 
= 1.
Assume the row is selected with X = 2.5 V and assume the data lines, through a write cycle, are 
= 0 and D = 2.5 V.
Determine the values of Q and just after the row select has been applied.
