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  Half Adder Full Adder and Flip Flops

Construction and Testing Of Half Adder Full Adder and Flip - Flops

To learn the two inputs of the arithmetic circuits of half adder, Full adder and Flip flops using ICs.

Components Needed:

S.no

Name of Component/Apparatus

Quantity

1.

2.

3.

IC 7486

IC 7408

IC 7432

2

2

1

Half adder:

1. A single logic circuit is employed for adding two single bit binary numbers and the outputs are acquired as sum and carry.

2. Sum is acquired from the output of EX - OR gate and carry is acquired from the output of AND gate.

3. Here A and B are stands for inputs and sum (s) and carry (c) are the outputs.

4. Half adder can obtain only two inputs it does not take the third carry.

Full adder:

1. A logic circuit that can be employed for adding three single bit binary numbers and provide the output of sum and carry

2. It takes three inputs involving the output of EX-OR gate and carry is from the input of AND gate.

3. It is the form of two half adder with OR gate

4. It has three inputs A, B, and C and two outputs S and C.

5. The o/p sum is doing A+B+C and the other o/p carry is doing A.B+ B.C+C.A

Flip Flop:

Flip Flop is doing the action along with the help of logic gates. It has one and more inputs and only two outputs. The inputs are 1 and 0 and it is stable when there is no change.

There five types of Flip -Flops, they are as follow:

1. SR Flip Flop

2. CSR Flip Flop

3. T - Type Flip Flop

4. D - Type Flip Flop

5. J.K Flip Flop

1. S-R Flip Flop (SET-RESET)

1. S-R Flip Flop is a basic circuit.

2. S-R Flip Flop has two inputs are set (s) and Reset (R) and has two outputs Q and Q

3. The figure and the truth table depict the action.

2. CSR FLIP - FLOP: (Clock Set Reset)

1. CSR FLIP - FLOP is not possible for changing the input at once. So a clock pulse is used as clock SR Flip - Flop

2. CSR FLIP - FLOP has three inputs S, R and C and outputs are obtained as Q and Q.

3. CSR FLIP - FLOP is a combination of four NAND gates which is verified by using truth table.

3. T-Type Flip Flop:

T-Type Flip Flop is employed for calculation. So it is called Toggling flip-flop. Via the input J and K are acquired the outputs as Q and Q that is verified by truth table.

4. D- Type Flip Flop:

D- Type Flip Flop is the next stage of CSR Flip flop. It is employed for memory the data's. Thus it is called Data flip flop we came to know the flip - flop by using the diagram and truth table.

5. J.K FLIP FLOP

1. CSR not permitted the input R= S= 1 so we can do it through the J.K flip flop

2. J.K flip flop has four NAND gates.

3. Inputs are provided and functional state diagrams are verified.

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