Random access machines (RAM), the ultimate RISC:
The model of computation termed as random access machine, or RAM, is used most frequently in algorithm analysis. This is significantly more ‘powerful’, in the sense of effectiveness, than either Markov algorithms or Turing machine as its memory is not a tape, however an array with random access. Given the programmer knows where an item currently required is stored; a RAM can access it in a single memory reference, ignoring the sequential access tape searching that a Turing machine or a Markov algorithm requirement.
The RAM is basically a random access memory, also abbreviated as the RAM, of unbounded capacity, as recommended in the figure shown below. The memory comprises of an infinite array of cells, addressed 0, 1, 2, …. To make things simple we suppose that each and every cell can hold a number, say an integer, of random size, as the arrow pointing to right recommends. The further supposition is that an arithmetic operation (+, –, • , / ) takes unit time, in spite of the size of the numbers included. This supposition is unrealistic in computation where numbers might grow very big, however is frequently helpful. As is the case with all models, the responsibility for employing them correctly lies with the user.
The ultimate RISC:
RISC stands for the Reduced Instruction Set Computer, a machine which has just a few kinds of instructions built to hardware. What is the minimum number of instructions a computer requires in order to be universal? One!
Let consider a stored-program computer of the ‘von Neumann type’ where data and program are stored in similar memory (John von Neumann, 1903 – 1957). Let random access memory (or RAM) be ‘doubly infinite’: There is a countable infinity of the memory cells addressed 0, 1,…, each of which can hold an integer of random size, or an instruction. We suppose that the constant 1 is hardwired to the memory cell 1; from 1 any other integer can be constructed. There is a single kind of ‘three-address instruction’ that we call ‘subtract, test and jump’, abbreviated as:
STJ x, y, z
Here x, y and z are the addresses. Its semantics is equal to:
STJ x, y, z ⇔ x: = x – y; if x ≤ 0 then goto z;
x, y and z refer to cells Cx, Cy, and Cz. The contents of Cx and Cy are treated as the data (that is, an integer); the contents of Cz, as instruction.
Figure: Stored program computer: Data and instructions share memory.
As this RISC has just one kind of instruction, we waste no space on an op-code field. However an instruction comprises three addresses, each of which is unbounded integer. In theory, three unbounded integers can be packed to the same space needed for a single unbounded integer. This simple idea leads to a familiar method introduced to mathematical logic by Kurt Godel (1906 – 1978).
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