Why do reset and halt have open drain outputs


Problem

1. The 68000, like any other similar digital device, can recognize a signal within tens of nanoseconds. Why then must the 68000's RESET* input be asserted for at least 100 rns after the initial application of power?

2. Why do RESET* and HALT* have O/D (open drain) outputs?

3. The function code outputs FC0--FC2 are active-high outputs, in contrast with the 68000's other control outputs. Do you think that there is a reason for this?

The response should include a reference list. Double-space, using Times New Roman 12 pnt font, one-inch margins, and APA style of writing and citations.

Request for Solution File

Ask an Expert for Answer!!
Computer Engineering: Why do reset and halt have open drain outputs
Reference No:- TGS02130029

Expected delivery within 24 Hours