Question 1: Which one of the subsequent four logic equations would be valid for the o6 output of a decoder with address lines a0, a1, a2 and outputs o0, o1, o2, o3, o4, o5, o6, o7?
- o6=(a0 AND (a1 AND a2))
- o6=(a0 AND NOT(a1 AND a2))
- o6=((a0 AND a1) AND NOT(a2))
- o6=(NOT(a0) AND (a1 AND a2))
- None of the above is correct
2. Which of the given statements is/are true?
- The MFC signal is not used when writing to memory
- Allowing a few simultaneous writers to a bus is easy
- SRAM usually takes more power per bit held than DRAM
- In general, outputs are enabled at the start of a clock cycle
- There is a race between the address and data lines when writing to memory
Give the answer of given question and also give details.