Assignment
List in sequence all micro-operations using RTL notation for the following Marie instructions assuming the addressing modes as discussed in class. Include the instruction fetch for each as well as the instruction execution, using the definition of fetch from the lecture notes.
1. LoadI 100
2. Add 10
3. Store 200
4. How many total clock cycles are required, from the beginning of fetch to the end of execution, for each of the above instructions assuming each micro-operation requires 1 clock cycle (including incrementing the PC as part of the fetch)?
5. Assume MARIE DID have an immediate address mode. Write down what you think its RTL sequence would be for these instructions: LOAD #100 and ADD #$200
6. How many bits are required to address a 4K x 16 bit memory:
a) If it is byte addressable?
b) if it is (16 bit) word addressable?
c) How many 512 byte chips would be required to construct it?
7. Suppose we want to construct a memory from RAM chips, where each chip contains 4 words. We want the memory to be word addressable. We have a total of 16 chips.
a) How many bits does it take to address then entire memory?
b) What is the total bit capacity of the memory? Total Word capacity?
c) If I constructed this memory using High-Order Interleaving, what would the address of the first byte of the first chip be?
What would the address of the last word of the first chip? What would be address of the 3rd word of the last chip?
8. Answer the question 7 again, but for Low Order Interleaving.
9. a) How many 256x8 RAM chips for 8M bytes?
b) How many total address bits?
c) How many address lines per chip?
d) How many address lines must be decoded for chip selects?
10. Construct a 128M x 16 memory using 512K x 8 RAM chips.
a) How many chips?
b) How many chips per word?
c) How many address bits per chip?
d) How many banks?
e) How many address bits total?
11. Suppose a 32 bit processor has 128 unique opcodes. All instructions are 32 bits and consist of an opcode and an operand address (as was the case with MARIE). The opcode field contains a binary code for an operation and a register #. There are 8 registers.
a) How many bits are required for the opcode?
b) How many bits are needed to encode the operation?
c) How many bits are needed to specify the memory address?
d) How many memory locations can this processor access?
e) What is the maximum memory size in bytes?
e) Largest unsigned value in a memory word?
12. List HEX code for this Marie program
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Address
100
101
102
103
104
105
106
107
108
109
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Label
S2
S1
A
One
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Instruction
LOAD A
ADD ONE
JUMP S1
ADD ONE
STORE A
HALT
ADD A
JUMP S2
HEX 0023
HEX 0001
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HEX Machine Code
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13. Give MARIE assembly language equivalent of these binary machine language instructions.
a) 0010000000000111
b) 1001000000001011
c) 0011000000001001
14. Consider the SKIPCOND instruction we talked about in the MARIE lecture. Compare it to the flowhart in the Zybook activity 2.7.1. What is different about the MARIE branching method compared to the MIPS method. Will it be more or less difficult to program than the MIPS instructions. Explain.
15. The last problems reinforce what you learned in Lab 2. But we are changing the rules a bit. The instructions are based on a pretend microprocessor called MUM ("Made Up Microprocessor").
MUM has an ISA that includes PUSH and POP instructions. The stack only addresses 16 bit values and there are general purpose registers R0 through R8. The source is on the right, destination on left, for all instructions.
LOAD destination, source
Memory is NOT byte addressable, only 16 bit words can be accessed. A subroutine is "called" by the JSR instruction and returns to the caller via RTS instruction. All instructions are 16 bits.
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$3000
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FFFF
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$3001
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FFFF
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$3002
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FFFF
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$3003
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FFFF
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$3004
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FFFF
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$3005
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FFFF
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$3006
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FFFF
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$3007
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FFFF
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$3008
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FFFF
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LOAD
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R0, #$1000
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LOAD
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SP, #$3008
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; Initialize the stack pointer.
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PUSH
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R0
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ADD
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R0,#1
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PUSH
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R0
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CALL
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MYSUBR
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; Execute the subroutine, MYSUBR
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HALT
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; Terminate the program.
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MYSUBR:
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; Assume the MYSUBR is located at program address $4015
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ADD
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R0,#1
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PUSH
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R0
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; FIND THIS PROGRAM ADDRESS
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ADD
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R0,#1
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PUSH
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R0
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LOAD
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R1, 3(SP)
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POP
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R0
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POP
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R0
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RTS
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a. When the program reaches the HALT instruction, stack memory will have changed. Rewrite the memory table to show its state when the program reaches the HALT instruction.
b. What will be the value stored in R1 at that point? Explain how you determined that answer.
c. We demand that the stack stay "balanced". What does this mean?
d. Is the stack "balanced" at the HALT instruction? Why or why not?
e. What would happen if I removed one of the POP instructions in MYSUBR? Would the program terminate at the HALT instruction?
f. What is the address of the instruction with the comment "FIND THIS PROGRAM ADDRESS"?