4. Using Quartus II, or an equivalent VHDL entry program, develop the text file and simulation for the shift register specified in Problem 3. Verify the timing diagram shown in Problem 3. Attach the .vhd and simulation files
Diagram from question 3 is attached as a 10-bit serial-in/serial-out shift register
5. Using Quartus II, or an equivalent VHDL entry program, develop the text file and simulation for the 74LS194A universal, bi-directional shift register. Attach the .vhd and simulation files.