The circuit, capable of dividing two binary numbers with decimal values as large as 10,000.
The circuit will have as inputs a minimum of two inputs; the binary equivalent of two decimal numbers of not greater than (10,000)10. The circuit will also produce a minimum of two outputs, the quotient and the remainder. Simulate the circuit using verilogger. microsoft windows version. (Any kind of help would be appreciated!)
Define the required logic of the device
Design all components down to gate level
Define inputs and outputs
Create a flow chart outlining the logic implemented by your circuit
If a state machine is used, provide a state diagram
Define the quiescent (idle) response of the circuit
Define any "error" or "undefined" states or input combinations of the circuit