The CMOS SR flip-flop in Fig. 16.4 is fabricated in a 0.13-μm process for which μnCox = 4μpCox = 500 μA/V2, Vtn = / Vtp / = 0.4 V, and VDD = 1.2 V. The inverters have (W/L)n = 0.2 μm/0.13 μm and (W/L)p = 0.8 μm/0.13 μm. The four NMOS transistors in the set-reset circuit have equal W/L ratios.
(a) Determine the minimum value required for this ratio to ensure that the flip-flop will switch.
(b) If a ratio twice the minimum is selected, determine the minimum required width of the set and reset pulses to ensure switching. Assume that the total capacitance between each of the Q and Q nodes and ground is 15 fF.
