2's complement addition is the most commonly performed operation indigital systems. Assume two n-bit 2's complement binary integersare to be added (or subtracted). Then the simplest (but by no meansthe fastest) approach to implementing addition is to cascade nfull-adders where the carry-out from one adder connects to thecarry-in port of the adjacent adder. Such an adder is called aripple-carry adder. Overflow (or underflow in subtraction) isdetected by an additional small logic circuit where the inputs areprovided by the sign bits of the input and output integers.
Task 1 - Develop a 4-bit adder circuit
1. Develop a 4-bit adder that correctly sums two 4-bit 2'scomplement integers. Besides providing the sum of the inputs,ensure overflow is detected. Use standard logic gates (inverters,AND, NAND, OR, NOR, XOR) to implement your circuit, not the 74181ALU in your kit of parts.
Task 2 - Develop a 4-bit subtractor
1. Extend the 4-bit ripple-carry adder developed in Task 1 toperform 4-bit 2's complement subtraction and reports overflow. Usestandard logic gates (inverters, AND, NAND, OR, NOR, XOR) toimplement your circuit, not the 74181 ALU in your kit of parts.