If the cpu architecture supports 8-registers r0 r1 r8 and


Suppose that we want to convert the small computer into a 16- bit RISC type of processor (address and data buses are both 16-bits wide and each instruction is supposed to occupy 16 bits in the instruction memory).

If the CPU architecture supports 8-registers (R0, R1, ..., R8) and a maximum of 32-instructions.

1- Show the instruction format for each type (I-Type, R-type and J-Type) and give an example of each one.

2- Show the data-path for the small computer with the 8-regisers described in 1.

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Computer Engineering: If the cpu architecture supports 8-registers r0 r1 r8 and
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