(a) For the sense amplifier of Fig. 16.20, show that the time required for the bit lines to reach 0.9VDD and 0.1VDD is given by td = (CB/Gm ) ln (0.8VDD/?V ) , where ?V is the initial difference voltage between the two bit ines.
(b) If the response time of the sense amplifier is to be reduced to one-half the value of an original design, by what factor must the width of all transistors be increased?
(c) If for a particular design, VDD = 1.2 V and ?V = 0.2 V, find the factor by which the widths of all transistors must be increased so that_V is reduced by a factor of 2, while keeping td unchanged?
