For the feedback register shown in figure 1 determine the

Question

Question 1- Obtain the minimal NAND and NOR logic functions required to drive the bottom horizontal bar of a seven-segment display, as shown above.

Question 2- Design a minimized first canonical form logic circuit which takes a BCD input and converts it to an Excess 3 code

Question 3- The input to a logic circuit is a 3 bit binary number. The output is the square of the input. Implement the design using a 3x6x4 PLA.

Question 4- Design a synchronous Modulo 8 counter using JK Flip - Flops.

Question 5- For the feedback register shown in Figure 1, determine the count sequence. Assume an initial state of Qa, Qb, Qc, Qd,Qe = 10000.

Question 6- Design a sequential logic system, using JK Flip-Flops, which detects a bit pattern of 1101 in a stream of serial data.