This problem concerns the design of a digital system that converts an 8-bit signed integer (negative numbers are represented in 2's complement) to a floating-point number. Use a floating-point format similar to the ones used in Section 7.1.1 except the fraction should be 8 bits and the exponent 4 bits. The fraction should be properly normalized.
(a) Draw a block diagram of the system and develop an algorithm for doing the conversion. Assume that the integer is already loaded into an 8-bit register, and when the conversion is complete the fraction should be in the same register. Illustrate your algorithm by converting -27 to floating point.
(b) Draw a state diagram for the controller. Assume that the start signal is present for only one clock time. (Two states are sufficient.)
(c) Write a VHDL description of the system.