Determine the wl ratio of the other transistors such that

Question

The Boolean function for a carry-out signal of a one-bit full adder is given by

Carry-out = A · B + A · C + B · C

(a) Design an NMOS logic circuit with depletion load to perform this function. Signals A, B, and C are available.

(b) Assume (W/L)_L = 1, V_DD = 5 V, V_TNL = -1.5 V, and V_TND = 0.8 V. Determine the W/L ratio of the other transistors such that the maximum logic 0 value in any part of the circuit is 0.2 V.