Problem
A multiprocessor system has three processors, each of which can request the bus at any time asynchronously. Each processor has a bus request output, BR,*, which it uses to request the bus. The arbiter has a bus grant output. BG,*, for each of the processors. The priority of each bus request is equal and the arbiter works on a first-come, first-served basis. If a single processor requests the bus (and the bus is free), that processor is granted the bus. If two or three processors request the bus, only one processor will receive a bus grant. The others must wait until the first processor's bus request is negated. Design a circuit to perform the arbitration process and provide timing diagrams where necessary. Indicate what measures you would take to avoid the danger of metastability. You may assume that a free-running clock at 25 MHz is available. Indicate any assumptions you make about the arbiter you are designing
The response should include a reference list. Double-space, using Times New Roman 12 pnt font, one-inch margins, and APA style of writing and citations.