Question: Consider two cache organizations both of them are using 32KB cache,32 bit physical address and 32B blocks. The 1st one is 2-way set associative cache, 2nd one is direct mapped cache.
The system is using a 2x1 multiplexer (0.6ns delay) and k-bit tag comparator (k/10ns delay).
Let H1 denotes hit latency for 2-way set associative cache and H2 denotes hit latency for direct mapped cache. What will be the values of H1 and H2.
Provide the answer of this question and also explain why?