Consider the circuit in Fig. with the device geometries shown at the top of this page. Let IREF = 40 μA, / Vt / for all devices=0.45 V, μnCox = 270 μA/V2, μpCox = 70 μA/V2, /VA / for all devices = 15 V, VDD = VSS = 1 V. Determine the width of Q6, W, that will ensure that the op amp will not have a systematic offset voltage. Then, for all devices, evaluate ID, / VOV / , / VGS/ , gm, and ro. Provide your results in a table. Also find A1, A2, the dc open-loop voltage gain, the input common-mode range, and the output voltage range. Neglect the effect of VA on the bias currents.
