Consider a system with 64 MB of physical memory, 32-bit physical
addresses, 32-bit virtual addresses, and 4 KB physical page frames.
(1)Using a single-level paging scheme, what is the maximum number of page table entries for this system?
(2)If an inverted page table is used to translate virtual addresses to physical addresses, how large would it need to be?
(3)What disadvantage is there, if any, in using an inverted page table versus per process page tables? What is used to counter the advantage?