1. Assume that you are implementing the wristwatch design from Section 11.1 on an FPGA board. Design the input module for the wristwatch for the FPGA board that you have and write the VHDL code.
2. Assume that you are implementing the wristwatch design from Section 11.1 on an FPGA board. Design the display module for the wristwatch and write the VHDL code. Use an FPGA board with an LCD display. Display the time, the alarm setting, or the stopwatch time depending on which mode the wristwatch is in.