A processor encompasses a five-stage pipeline and runs at one gigahertz frequency. Instruction fetch happens within the initial stage of the pipeline.
A conditional branch instruction computes the target address and evaluates the condition within the third stage of the pipeline. The processor stops winning new directions following a conditional branch till the branch outcome is thought.
A program executes a hundred and five directions out of that two hundredth square measure conditional branches.
If every instruction takes one cycle to complete on the average, the full execution time of the program is: