Circuit delaying the closing of an elevator door


According to its design specification, the timer circuit delaying the closing of an elevator door is to have a capacitance of 29.0 µF between two points A and B. When one circuit is being constructed, the inexpensive but durable capacitor installed between these two points is found to have capacitance 31.2 µF. To meet the specification, one additional capacitor can be placed between the two points.

(a) Should it be in series or in parallel with the 31.2 µF capacitor?

  • in series
  • in parallel

(b) What should be its capacitance?

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Physics: Circuit delaying the closing of an elevator door
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