A novel scheme for dissipating heat from the chips of a multichip array involves machining coolant channels in the ceramic substrate to which the chips are attached. The square chips (Lc = 5 mm) are aligned above each of the channels, with longitudinal and transverse pitches of SL = ST = 20 mm. Water flows through the square cross section (W = 5 mm) of each channel with a mean velocity of um = 1 m/s, and its properties may be approximated as p = 1000 kg/m3, cp = 4180 J/kg · K, µ, = 855 X 10-6 kg/s· m, k = 0.610 W/m · K, and Pr = 5.8. Symmetry in the transverse direction dictates the existence of equivalent conditions for each substrate section of length Ls and widthST.
(a) Consider a substrate whose length in the flow direction is Ls = 200 mm, thereby providing a total ofNL = 10 chips attached in-line above each flow channel. To a good approximation, all the heat dissipated by the chips above a channel may be assumed to be transferred to the water flowing through the channel. If each chip dissipates 5 W, what is the temperature rise of the water passing through the channel?
(b) The chip-substrate contact resistance is Rt",c = 0.5 X 10-4 m2 · K/W, and the three-dimensional conduction resistance for the Ls X ST substrate section is Rcond = 0.120 K/W. If water enters the substrate at 25°C and is in fully developed flow, estimate the temperature Tc of the chips and the temperature Ts of the substrate channel surface.