Inverter Design:

Figure: Bipolar Transistor Inverter Circuit

Usually select I_C mid range for a high value of β_F.

Let consider a supply of  = 5V.

A usual mid-range value of I_C would be 3 to 5 mA.

For I_C = 5mA,   

R_c = V_CC/I_{CMAX =}1 KΩ

A usual β_F = 50 for an integrated transistor.

When we employ a base overdrive factor of σ_u = 5. Then,

σ_u = β_FR_C/R_B  => 5 = (50 x 1 KΩ)/RB => R_B = (50 KΩ)/5 = 10 KΩ

The idea is just to ensure that RB gives sufficient current to overdrive the transistor. Rewriting the relationship, the selection is really:

R_B = (β_F/σ_u) R_c

Operation and Output Characteristic:

Figure: Collector Current as the function of Base-Emitter Bias

The collector current which flows via the transistor depends on the bias applied to the base emitter junction according to normal exponential law for the p-n junction.

Generally,

V_{BE cut - in} = 0.6V

V_{BE on} = 0.7V

V_{BE sat} = 0.8V

Referring to the output characteristic of figure shown below that shows an operating load line, the below can be seen. At very low input voltages, V_BE is small and no current flows in the collector of transistor, apart from certain small leakage current. Therefore, the output voltage is at V_o = V_CE = V_CC. If the input voltage to inverter is slowly raised, ultimately the base-emitter junction reaches the point of cut-in if V_i = V_{BE CUT-IN} at point A on the characteristic as shown in figure below. Here, I_C ≈ 0 and hence V_o = V_CE = V_CC still. Since the input voltage is further raised, base current begins to flow and the transistor enters the forward active mode where I_C = β_F I_B and the operating point travels upward all along the load line. Ultimately, the point B is reached where I_B = I_CMAX/ β_F and the transistor arrives at the edge of saturation. In this condition, the collector current reaches its maximum value and the output voltage drops to its minimum of V_o = V_CESAT ≈ 0.1 – 0.2 V. Further raise in the input voltage overdrives the transistor deeper into saturation however has little effect on collector current or output voltage.

Figure: Output IC vs. VCE Characteristic for Single Transistor Inverter

Transfer Characteristic:

The transfer characteristic of a logic gate is just a plot of steady-state output voltage vs. input voltage over its range of operation such as that shown in figure below. Initially if V_i = 0, then T is OFF and hence I_C = 0 and V_O = V_CC. As V_i is slowly raised, a point is ultimately reached at A, where the transistor starts to turn ON. This is termed to as the cut-in point for the transistor or the “edge of conduction”. Since V_i is further raised, the transistor becomes fully conducting and enters the forward active mode among the points A and B on the characteristic. As the collector current rises, the output voltage drops from V_CC towards ground till the transistor reaches the edge of saturation at point B. The slope of characteristic among points A and B is basically determined by the gain of circuit. Finally, as the transistor is driven fine into saturation, the output voltage levels off at V_o = V_CESAT. Critical points on the characteristic are points A and B as these are points that define the transition region in the output between the high and low logic level. They as well define the boundaries of operation between, Cut-off, Forward Active and Saturation modes of operation of the transistor.

Logic Voltages:

Output Levels: From the transfer characteristic for single transistor inverter, it can be seen that the output HI and LO logic voltages are fine defined.

V_OL = V_CESAT; V_OH = V_CC

Input Levels: The input logic voltages are not as evidently defined and can occupy ranges where the output remains at the accurate logic level. The critical points, A and B, on the characteristic can be employed as critical points to define the limiting values for such ranges.

Point A defines the input voltage that just starts to turn on the transistor and is, therefore, the maximum input LO voltage.

Therefore:

V_iLMAX = V_{BE CUT-IN}; Usually 0.6 V

Point B defines the minimum input voltage that will just keep the transistor at the edge of saturation region and therefore as well at the edge of linear forward active region. At this point:

V_i = V_iHMIN

I_CMAX = β_F I_B

(V_CC – V_CESAT)/R_C = β_F (V_iHMIN - V_BESAT)/R_B

[(V_CC – V_CESAT) R_B]/ β_F R_C = V_iHMIN - V_BESAT

V_iHMIN = V_BESAT + (R_B/ β_F R_C) (V_CC – V_CESAT) = V_BESAT + (1/σ_u) (V_CC – V_CESAT)

For component values which are established above:

V_iHMIN = 0.8 + (1/5) (5 – 0.2) = 0.8 + 0.2 x 4.8 = 0.8 + 0.96 = 1.76 V

Figure: Transfer Characteristic of Bipolar Transistor Inverter

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