Simple Finite State Machines, Finite State Machines

Simple finite state machines:

Simple finite state machines encountered in the light switches, ticket vending machines, wrist watches, computer user interfaces and so on.

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Shift register: It save the last 3 bits of the data stream:

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Counter mod m with reset (example: clock):

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Serial binary adder:

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FSMs are the standard system components for executing arithmetic numbers of fixed size, state 32 bits; however they can’t do much more than addition and subtraction on numbers of random size.

Exercise: Illustrate that there is no fsm multiplier for the numbers of random size.

Mod 3 divider: Read a binary integer ‘left to right’, that is most significant bit first, and calculate its remainder mod 3.

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Explanation: Let consider an integer with the binary representation L b, where L is the bit string and b is a single bit.

Let |L| represent the integer symbolized by L, and likewise for |L b|. Suppose L has been read, most noteworthy bit first, and, by way of illustration, the fsm is now in state ‘≡1’, signifying that |L| mod 3 = 1. Then L 0 symbolizes the integer |L 0| = 2 |L|, where |L 0| mod 3 = 2; and L 1 symbolizes |L 1| = 2 |L| + 1, where |L 1| mod 3 = 0. This validates the two transitions out of state ‘≡1’. We can turn this fsm to an acceptor by designating certain state(s) as accepting, and therefore recognizing any language that is a union of residue classes mod 3. Example: L0 = {x | |x| mod 3 = 0}, or L12 = {x | |x| mod 3 ≠ 0}, where |x| is an integer represented by x.

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