Problem
With virtual memory, every memory reference needs to be translated from virtual to physical address, dynamically. Mapping is done on a page basis. If the mapping is not found in the TLB, the processor walks" the page table. Let us consider a system with 32-bit addresses and 4KB pages and 4KB page frames. Each page table entry (PTE) comprises 4 bytes (32 bits).
Consider a process whose entire address space comprises 300 pages of virtual memory. The number of pages in the page table "tree" (top level and second level) depends on which areas of virtual memory are used. What is the minimum number of page frames needed to hold the page table structure such a process? What is the maximum number of page frames needed to hold the page table structure such a process?