Superscalar architecture was designed to increase the speed of the scalar processor. But it has been realized it's not easy to apply. Subsequent are a number of problems faced in the superscalar architecture:
• It is needed that extra hardware should be given for hardware parallelism like decoder and arithmetic units, instruction registers etc.
• Scheduling of instructions dynamically to diminish the pipeline delays and to keep all processing units busy is very hard.
Another option to increase speed of processor is to use a series of instructions having no dependency and might need various resources so avoiding resource conflicts. The concept is to unite these independent instructions in a compact long word integrating many operations to be executed concurrently. So this architecture is known as "very long instruction word (VLIW) architecture". Actually long instruction expressions carry the opcode of various instructions that are dispatched to several functional units of the processor. In this manner all the operations to be implemented concurrently by the functional units are synchronized in a VLIW instruction. The size of VLIW instruction word may be in hundreds of bits. VLIW instructions should be formed by compacting small instruction words of conventional program. The job of compaction in VLIW is completed by compiler. The processor should have the enough resources to implement all the operations in VLIW word concurrently.