Given the following specifications for an instruction set to be implemented be some target machine:
1. Show the minimal amount of architecture needed to implement the instructions set.
2. Write the micro-program code that will be used to design and build the control unit.
3. Design and draw, using a straight edge, the control unit. Make sure the control unit is a "one-hot" control unit like discussed in class.
4. In a paragraph or two, discuss the IR and MAR design. Make sure your discussion includes how many bits in each register, what a typical opcode looks like, and how an escape codes you may have work.
5. Describe all control lines needed and how they are connected to the control unit.
|
Opcode
|
Mnemonic
|
Description Loads the accumulator from IR(addr) Store the accumulator into memory Increment the contents of a memory location
|
|
0
|
ACMEM
|
|
1
|
STOM
|
|
2
|
INCMEM
|
|
3
|
SUBAC
|
Subtract the contents of IR(addr) from accum
|
|
4
|
ADD2
|
Add two adjacent memory locations
Ex. ADD2 10 would add location 10 to 11 and store result in 10.
|
|
5
|
JSR
|
Jump to subroutine in IR(addr) Do a 2's Compliment negation of data in
IR(addr)
|
|
6
|
NEGMEM
|
|
7
|
DEC
|
Decrement the memory location in IR(addr)
|
|
8
|
CLR
|
Clear memory location in IR(addr)
|
INSTRUCTION SET (OPERANDLESS)
|
Opcode
|
Mnemonic
|
Description
|
|
0
|
RET
|
Return from a subroutine
|
|
1
|
DBL
|
Integer double the Accumulator
|
|
2
|
SKIP2
|
Execute the instruction 3 words in advance.
|
|
3
|
HALT
|
STOP EVERYTHING
|
If all registers (except the MAR) and memory are 64 bits, how much memory can be accessed with your design? How big is the MAR?