Q. Explain about RISC ARCHITECTURE?
Let's first list some significant considerations of RISC architecture:
1. RISC functions are kept simple unless there is a very good reason to do otherwise. A new operation which increases execution time of an instruction by 10 per cent can be added only if it decreases size of the code by at least 10 per cent. Even greater reductions might be necessary if the extra modification requires a change in design.
2. Micro-instructions stored in CU cannot be faster than simple instructions because the cache is built from same technology as writable control unit store, a simple instruction can be executed at same speed as that of a micro-instruction.
3. Microcode is not magic. Moving software into microcode doesn't make it better; it only makes it harder to change. Runtime library of RISC has all characteristics of functions in microcode, except that it's easier to change.
4. Simple decoding and pipelined execution are more significant than program size. Pipelined execution gives a peak performance of one instruction each step. The longest step determines the performance rate of pipelined machine so ideally every pipeline step must take same amount of time.
5. Compiler must simplify instructions instead of generate complex instructions. RISC compilers try to eliminate as much work as possible at the time of compile time so that simple instructions can be used. For illustration RISC compilers attempt to keep operands in registers so that simple register-to-register instructions can be used. RISC compilers keep operands which will be reused in registers instead of repeating a memory access or a calculation. They consequently use LOADs and STOREs to access memory so that operands aren't implicitly discarded after being fetched.