Obtain the gain margin and phase margin


Problem: (Differential Amplifier Design): Design a differential amplifier using suitable topology to meet the specifications prescribed for you. VDD is 3.3V.

1. Output swing has to be at-least 80% of VDD.

2. Power supply rails available are VDD and ground only.

3. Only one current source can be used in the design IREF = 50µA.

4. Every bias voltage needed has to be generated by designing proper circuits.

5. Use of Resistors is not allowed in the design.

6. Use a load capacitance of 1PF on both the output terminals.

7. ICMR should be 0.2VDD to 0.8VDD

8. Phase margin has to be at-least 45o.

Analysis Required:

1. DC operating point of each MOSFET in the circuit as obtained from SPICE.

2. Bode Plot for differential mode gain and CMRR.

3. Obtain the Gain margin and phase margin.

4. ICMR and output swing calculation from SPICE.

5. Plot the variation of differential mode gain when VDD varies by ±10%.

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Attachment:- Differential Amplifier-Spice assignment.rar

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Electrical Engineering: Obtain the gain margin and phase margin
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