Q1. Describe the multiple-module memory interleaving with a neat block diagram.
Q2. Describe the serial and parallel data communication.
Q3. A Virtual memory consists of an address space of 8K words, a memory space of 4K words and page sizes of 1K words.
The given page reference changes take place during a specific time interval.
4 2 0 1 2 6 1 4 0 1 0 2 3 5 7
Find out the four pages which are resident in the main memory after each page reference change if the replacement algorithm employed is:
a) FIFO
b) LRU
Q4. Compare the superscalar architecture to the VLIW architecture.
Q5. Describe the delay in pipeline execution. A non-pipeline system takes 50ns to complete a task. The similar task can be processed in a six segment pipeline with a clock cycle of 10ns. Find out speed-up-ratio of the pipeline for 100 tasks. Illustrate the maximum speed-up which can be accomplished?
Q6. Categorize the parallel computers and give its comparison.
Q7. Write brief notes for the given:
a) Vector computers and array processors
b) RS 232C specifications and applications
c) Micro Sequencer design
Q8. Compare the associative, set-associative and direct mapping procedures.