In this problem you will design a moore finite state

Question

In this problem you will design a Moore finite state machine that realizes a synchronous 3-bit counter with a mode control input M and three outputs Q_A^, Q_B, and Q_c. When M = 0, the counter output advances through the 3-bit numbers using a step size of 2. When M = 1, the counter advances through the 3-bit numbers using a step size of 3.

1. Represent the Moore finite state machine by completing the state table in Figure.

Figure 1: State table for a synchronous 3-bit counter with a mode control input M.

2. Sketch the corresponding state diagram.

3. Given that the state machine is realized using D-type flip-flops, obtain logic equations in terms of M, Q_A, Q_B, and Q_C for the flip-flop inputs D_A, D_B, and D_C using the four-variable Karnaugh map.

• You must use the format of the four-variable Karnaugh map do not interchange the position of the variable M, Q_A, Q_B, and Q_C.
• Include one four-variable Karnaugh map for each b-type Hip-flip input.
• In each K-map, circle the miniterms corresponding to each term in your expression for the D input.

4. Draw the logic circuit that realizes the signal D_A in terms of M, Q_A, Q_B and Q_C using NAND gates. Do not realize logic circuits for the remaining inputs D_B and D_C.