Here is your Python Project description, you are given the following technology and design datafrom 1) to 7).
1) You have the following technology data from Foundry companies, they are located at the specified paths.
tsmc45, 6ml:
lef: Cow11Cow12 Cow13
lib: Lion11 Lion12 Lion13
sdc: Lamp1
drc: Dog1
lvs: Cat1
synthesis: Zebra1
tsmc45, 7ml:
lef: Cow21 Cow22 Cow23
lib: Lion21 Lion22 Lion23
sdc: Lamp2
drc:Dog2
lvs: Cat2
synthesis: Zebra2
tsmc65, 6ml:
lef: Cow31 Cow32 Cow33
lib: Lion31 Lion32 Lion33
sdc: Lamp3
drc: Dog3
lvs: Cat3
synthesis: Zebra3
umc45, 6ml:
lef: Cow41 Cow42 Cow43
lib: Lion41 Lion42 Lion43
sdc: Lamp4
drc: Dog4
lvs: Cat4
synthesis: Zebra4
2) Your design data are listed below:
Top cell name: TOP
GDS(Layout): Orange
Schematic Netlist: Apple
DEF: Watermellon
RTLverilog: Mango
Power value: 5 (volt.)
3) The original PnR"dtmf.conf" file has the following content:
set rda_IASICt(ui_qxconf_file) {}
set rda_IASICt(flip_first) {1}
set rda_IASICt(double_back) {1}
set rda_IASICt(ui_timingcon_file) "Put correct value here " (SDC)
set rda_IASICt(assign_buffer) {0}
set rda_IASICt(ui_timelib,min) "Put correct value here" (LIB)
set rda_IASICt(ui_pg_connections) ""
set rda_IASICt(ui_gen_footprint) {1}
set rda_IASICt(ui_leffile) " Put correct value here "
4) The DRC run file has one example:
drc -top_cell TOP -gds_layout "Put correct value here"-drc_deck"Put correct value here"
5) The LVS run file has one example:
lvs -top dtmf -gds_layout"Put correct value here" -sch"Put correct value here"
-lvs_deck"Put correct value here"
6) The Logic Synthesis file has the following statements:
include"Put correct value here"
read -f verilogmux_using_assign.v
current_design = mux_using_assign
link
compile
create_schematic
plot -output mux_using_assign.ps
write -f verilog -o mux_using_assign.vs -hierarchy
exit
7) The Power/IR/EM file has one example:
power_grid -lef"Put correct value here" -gds"Put correct value here" -sch"Put correct value here"-dotlib"Put correct value here"-vdd 2.5 -sdc"Put correct value here"-def"Put correct value here"
Your task is to encode a PYTHON code with Object-Oriented Programming methodology to:
A) Execute your code like:
./code.py -t Technology (tsmc65 or umc45) -p Process(6m) -g layout_full_path -s sch_full_path -n top_cell_name -r RTL_verilog_full_path
-dDEF_full_path -v power_value
And, it should include a "-h" to list the usage of your script.
B) Automatically create 5 sub-directories under your current working directory:
pwr/ pnr/ drc/ lvs/ syn/
C) Grep all required data listed from the 1) to 7) and construct required run file for each step (pnr, drc, lvs, syn, pwr)based upon the choice of technology and process when executing your script.
D) Put your run file under each created sub-directory
E) Put comment and explanation to each line of your script.