Problem: A certain program contains 2,480,000 instructions. Each instruction is executed exactly once on a processor running at a 4 GHz clock rate. There are no branch or jump instructions in the program. Twenty-two percent of the instructions are lw instructions, twelve percent of the instructions are sw instructions, and all of the remaining instructions are R-type instructions. Our MIPS pipeline system is an example of a scalar pipeline since no more than one instruction at a time can occupy any stage.
a) If the first instruction to enter the scalar pipeline is an R-type instruction, what is the maximum number of nano-seconds required for the R-type instruction to complete all five pipeline stages if the clock rate is 4 GHz?
b) After the first R-type instruction completes the write-back stage, what is the maximum number of instructions per second that this pipeline can complete.