1. Explain the different types of cache misses and how each one can be reduced.
2. Assume a direct - mapped cache memory where n is the number of address bits for the memory, n 1 is the number of address bits for each block in the memory, and n 2 is the number of address bits for each block in the cache.
(1) What is the number of words in the memory?
(2) What is the number of blocks in the memory?
(3) What is the number of blocks in the cache?
(4) What is the number of words in a block?
(5) What is the number of words in the cache?
3. A cache memory has a capacity B block but actually contains b . What is the conflict miss probability for the three types of block mapping strategies?