Consider a processor in which a two-word instruction is stored at location 100 with its address field at location 101 as shown below. The first word of the instruction specifies the operation code and mode; the second word specifies the address part. The values of the program counter (PC register), a general register (R1), the index register (XR), the base register (BR), and certain addresses in memory are as shown below. (Note: all values are in hexadecimal).
Memory Registers
Address Content Register Content
100 Load to AC opcode;
mode PC 100
101 600 R1 300
? ? XR 200
200 300 BR 300
? ?
300 700
? ?
400 200
? ?
500 100
? ?
600 400
? ?
702 500
? ?
800 900
? ?
900 800
Evaluate the effective address and the value that is loaded into the AC for the following addressing modes. Note that if the effective address can be either a memory location or a register.
Addressing Mode Effective address Value of the operand loaded into the AC
a) Immediate
b) Direct addressing
c) Indirect addressing
d) Register
e) Register indirect
f) Relative address
g) Base register addressing
h) Indexed addressing