Part A: Switching regulator design exercise
Theoretical design
Note: This design is entirely theoretical. You will not be expected to assemble the circuit and test it.
Collect information
Data on the TL497AI switching voltage regulator is provided from Texas Instruments. From this data assemble the following:
- a table showing
- allowable input voltage range
- allowable output voltage range
- V ref (typical)
- switching transistor maximum current
- diode maximum current
- A sketch of the power dissipation rating curve.
Data on ferrite cores suitable for construction of inductors is also provided.
Design
Using this data and the typical application data (use the basic configuration even if current values fall slightly outside the specified range), design a regulator to meet the specifications below. Include component ratings in your design and choose the inductor core, wire size and number of turns. Your design should also include thermal considerations by estimating the heat loss. If necessary, specify heat sink thermal resistance.
Example Specifications:
Type of regulator : Step down
Input voltage Vi : 24
Output voltage Vo : +5V
Output current Io : 300 mA
Maximum output ripple Vr : 50 my
Ambient temperature Ta : 50 deg C
Report
Present a report containing the following:
- Assembled data
- Design calculations, including inductor core choice/details
- A circuit sketch using the same schematic layout as in the data, and showing all component values including ratings
- Calculations to determine any heatsink that may be needed
Part B: Active filter design exercise
Design
Design an n pole filter with a particular family response having a cut-off frequency of F [Hz]. The filter is to use the second order circuit arrangement given below, and first order section with LM108 or equivalent op. amps. (Can be simulated with 741s).
(Your specifications will be individualised and provided on the StudyDesk)
Circuit of Second Order Part
Theory
From the theoretical pole positions, compute and plot the following:
- the magnitude and phase of the normalised frequency response
- the group delay (-0/dw) as a function of frequency.
Note that this will be a normalised plot with a cut-off frequency of 1 rad/sec.
Hints: Plot ω over the range 0.01 to 10 and define i = √-1, and remember that a 3-pole where a, b, c are the complex poles.
The use of MathCAD or a similar programme makes this simple, but do it manually if necessary. Six or eight points on a plot should be enough.
Simulation
Using MICROCAP simulate your circuit and plot gain, phase and group delay versus frequency over the range 1 Hz to 10 kHz. This will also tell you if your design is correct.
Report
Present a report containing the following:
1. Your theoretical analysis
2. Your full design calculations
3. A full schematic showing component values
4. Attach MicroCap plots for the Schematic (showing node numbers) and the AC analysis
5. A conclusion discussing the filter's performance compared to the specification.
Part C: Electronic integrated circuits ICs
Select two ICs from the list below and submit a short report for each, covering the following details:
- what the IC is (name, type)
- explanation of the IC's features and how it works
- sample circuit application making use of its feature(s) with a circuit operation explanation (include any relevant calculations).
Attachment:- Assignment Specs.rar