Q1. Design a CMOS Inverter so that that Vinv = 1.6V. Assume Vdd = 5.0 V, Vtn = 0.6 V. Vtp = -0.8 V, µn Cox = 60 µa/V2, µp Cox = 20mA/V2, λp = 0.05V-1 and λn = 0.1 V-1.
Q2. a. Tristate a CMOS inverter by controlling the input side of the inverter. Draw the block diagram only.
b. A analog switch must be designed using one type of transistor only. Assuming T15D process from MOSIS select the appropriate transistor Justify your transistor selection process.
c. Implement the tristate circuit by optimizing the number of transistors in the control section.
Q3. Using transistor parameters given in 1, Vdd = 5.0V and Vss = 0V
Design a simple NMOS current source to deliver 100 µa at Vgs = 1.25 V
Design a simple PMOS current source to deliver 100 µa at Vgs = 1.25 V
Using the PMOS current source as load and NMOS current source as the bias circuit draws the circuit of a common source amplifier. Derive the expression of the DC gain and compute the DC gain.
Add a 2pf capacitor between the Drain and Gate of the amplifier transistor. Determine the dominant pole of the amplifier. Derive all equations.
Q4. Derive the expression of gain for the source follower circuit shown below using high frequency model and Miller theorem. For the source follower amplifier shown below assume Vdd = 2.5 V and Vss = - 2.5V. Design the circuit so that Vgs of M3 is = -2.5V and Vg of M1 is at 0 V at Ids = 100 µa. Assume L = 5 µm.
Q5. For the source follower amplifier shown below. Derive the expression of gain at high frequency. Express the gain in terms of Avo/(s + wp1). Where Avo is the DC gain of the amplifier and Wp1 is the dominant pole.
